1. Field of the Invention
The present invention relates to integrated circuit design and manufacturing. More specifically, the present invention relates to a method and an apparatus for using a database to quickly identify and correct a manufacturing problem area in a layout.
2. Related Art
Semiconductor manufacturing technologies typically include a number of processes which involve complex physical and chemical interactions. These processes typically have process variations that can cause the characteristics of the integrated circuit to be different from the desired characteristics. If this difference is too large, it can lead to manufacturing problems which can reduce the yield and/or reduce the performance of the integrated circuit.
Today, the semiconductor manufacturing industry is facing a serious problem: the intersection between the patterns that a design desires to produce and the capabilities of the manufacturing process is growing increasingly miniscule. Many new process capabilities are being developed, but they are not enough to produce the full range of desired patterns. A promising solution to this problem is to identify the working overlap region at design time and to keep all patterns within the overlap region. Unfortunately, prior art techniques cannot quickly and accurately identify the working overlap region at design time.
An important goal in semiconductor design and manufacturing is to allow as much design freedom for the design team as possible, while still producing a manufacturable layout, all in a rapid turn around time. Failure to allow design freedom can result in increased die size or reduced device performance. Conversely, allowing unlimited design freedom can result in reduced yield or even total device failure. Unfortunately, prior art techniques cannot quickly and accurately identify states that can lead to manufacturing problems. If these states are padded, device performance and die size are impacted. If these states are loosened, the wafer yield is jeopardized.
Prior art techniques usually determine the transition from a manufacturing limiting pattern to a manufacturing capable pattern using rule-based approaches which typically capture relationships between neighboring polygons. However, as relationships between nonadjacent polygons become important, as found in illumination systems employing off-axis illumination for example, prior art techniques become deficient in their ability to accurately identify manufacturing problems.
Hence, what is needed is a method and an apparatus to improve the manufacturability of a layout by quickly identifying and correcting manufacturing problems.